The present invention relates to a failure analysis system of a logic LSI in which software is incorporated.
A LSI ((Large Scale Integration circuit) such as a microcomputer and a DSP (Digital Signal Processor) is a logic LSI in which software is incorporated. Hereinafter, this will be merely referred to as a “microcomputer”. In a system using a microcomputer, due to a defect or the like arising in a wafer process, a defect may arise that cannot be detected by a delivery inspection. Hereinafter, a microcomputer having such a defect will be referred to as a “defective microcomputer” and a microcomputer without a defect will be referred to as a “normal microcomputer”.
FIG. 53 typically shows that a defective microcomputer 5 is incorporated in a target system 1 of a failure analysis. The defective microcomputer 5 is connected to a display circuit 2 and an input/output circuit 3 by a signal line through an inner circuit 4, and on the other hand, the defective microcomputer 5 is connected to an interface circuit 6 by the signal line. An arrow in FIG. 53 indicates incomings and outgoings of a signal (information) (hereinafter, this is same in the present specification and present drawings). The defect of the defective microcomputer 5 will be found when the defective microcomputer 5 is incorporated into the target system 1 and the system is inspected or when the target system 1 is used.
Conventionally, in the failure analysis of the microcomputer, the defect is repeated by the system in which the microcomputer is incorporated to seek a cause according to the analysis of a circuit signal configuring this system. For example, in the case that the defect of the microcomputer is proved, the failure analysis of this defective microcomputer is carried out in such a manner that the defective microcomputer is separated from the system and a more detail test program is carried out by a LSI tester.
As a technical literature related to the above described related art, the followings may be considered.
JP-A-6-95913
JP-A-5-334120
JP-A-2001-249823
However, in the defective microcomputer, the defect may arise only when the special conditions not detected on the items of the delivery inspection are met, and this results in making impossible to examine all the possibilities of generation of the defect even by a detailed test program.
For example, according to a conventional failure analysis method to generate a defect artificially with the microcomputer mounted on the system and to analyze a signal by a logic analyzer, the conditions from start of the system till the generation of the defect are not the same at a clock resolution level of the microcomputer. As a result, the conditions of parameters owned by a software are different and thereby, a generation probability of the defect and repeatability of the condition of the defect are not high.
In addition, according to a conventional failure analysis method to mount a single piece of the microcomputer on a tester and to operate a test program, a defect is not repeated in the case that a cause of the defect is not included in the signal to be supplied to the microcomputer by the test program. In addition, this test program is manufactured by predicting a defective signal according to the above described conventional failure analysis method to generate a defect artificially and to analyze a signal by a logic analyzer. Therefore, it takes enormous amounts of man hours to manufacture the test program and further, a ratio of finding the defect is low, and resulting in a low efficiency of the failure analysis.
The cause of generation of the defect in the microcomputer and the process to the detection of the defect will be described in detail below.
FIG. 54 is an inner structural view of a normal microcomputer. As shown in FIG. 54, a microcomputer 7 has a ROM (Road-Only Memory) 8, a CPU 10, a RAM (Random Access Memory) 11, an interface register 12, a peripheral resister 13, an input/output interface 14 such as an IO (Input Output) port, a peripheral 15, an input terminal 16, and an output terminal 17. Then, in the ROM 8, application software 9 is located. An arrow shown in FIG. 54 represents a flow of a signal (information). In the microcomputer 7, the data is written in the RAM 11 and the registers 12 and 13 by the application software 9 so that hardware (the ROM 8, the CPU 10, the RAM 11, the interface 14, and the peripheral 15) maybe controlled.
FIG. 55 is an inner structural view of a defective microcomputer. With reference to FIG. 55, the case will be described in which the defect of some kind is generated in the hardware. An asterisk shown in FIG. 55 represents “defective”, “abnormal”, or “false”. In FIG. 55, since a condition that the defect arises is met assuming that a defect is generated in the peripheral 15, a content of the peripheral resister 13 showing the peripheral condition becomes “abnormal”. Then, the application software 9 reads this register 13 and resulting in a false judgment. Then, the false information will be written in the RAM 11. Further, the application software 9 will read the RAM 11 in which this false information is written. Reaching to the process for outputting the value from a port, the false value will be written in the interface register 12 and the interface 14 will output the false information. The defect can be detected from the outside of the defective microcomputer 5 only by outputting this false information.
As described above, in the microcomputer in which the application software lies, even if the defect is generated, time lag may be generated for a period of time from generation of the defect to the detection thereof. Therefore, in order to analyze the cause of the defect, it is necessary to presume a true cause by predicting the operation of the application software on the basis of the detected defective information and predicting the conditions of the RAM and the resistors or the like.
However, the conventional analysis method involves the following problems.
1. The repeatability of the defect is not good.
2. It is difficult to analyze the relevance between the true defect and the detected defect.
3. It is difficult to establish a test method to prevent reappearance of the defect.
4. It is difficult to build an analysis system.